Chip and memory supply
Enough advanced chips, packaging and high-bandwidth memory.
capabilityBuilt today Built but scarce · 4 of 5 Open on the map →
Facts
- Lane
- Compute hardware
- Wave
- 1 of 12 (build order, not a date)
- Needs
- 0 boxes all the way back through hard links
- Unlocks
- 112 boxes downstream through hard links
- Leverage
- None: already built
- Cluster
- Compute governance and geopolitics
Evidence as of October 2026
Epoch AI names chip packaging and high-bandwidth memory as the next limit after power. The IEA notes China refines about 99% of the gallium used in advanced chips.
Detail boxes 4
Joining chips and memory into one package (TSMC’s CoWoS), the step that limits accelerator output.
TrendForce reports the CoWoS supply–demand gap at about 20%, narrowing to about 10% by the end of 2026. AI 2027’s compute forecast names packaging and memory as the binding limits.
The extreme-ultraviolet machines, made only by ASML, that print leading-edge chips.
ASML expects about 65 Low-NA EUV shipments in 2026 and about 30% more EUV capacity in 2027, with 2027 orders nearly covered.
AI agents designing and checking chips: AI starting to build its own substrate.
Cadence claims its ChipStack agent validates chip designs more than 40 times faster, with early access in the second half of 2026. These are vendor figures.
The special glass-fibre cloth (T-glass) woven into advanced IC substrates and high-end boards, made mostly by one Japanese firm.
Nittobo holds about 90% of T-glass supply and its new capacity is not expected before mid-2027, so the shortage 'cannot be resolved in the short term' (TrendForce, 30 Apr 2026).
Around it
Nothing beyond the detail list. It can start at any time.